Wireless communication techniques using an impulse communication scheme represented by UWB (Ultra Wide Band) do not necessarily require linearity for the transmitting/receiving circuit elements, and so is suitable for the CMOS (Complementary Metal Oxide Semiconductor) and can be miniaturized. Wireless communication techniques do not require RF circuits such as precise local signal sources and consumes low power, and, furthermore, has an advantage of enabling high speed communication utilizing a wide band.
For a conventional method for synchronizing received pulse signals in a pulse radio receiving apparatus, a method of tracking synchronization based on correlation between the reference time and signals that are subjected to delay processing and that are arrive before and after the reference time is known (see, for example, Patent Document 1). The conventional technique will be described below with reference to the accompanying drawings.
FIG. 1 is a block diagram showing the configuration of the conventional pulse radio receiving apparatus disclosed in Patent Document 1. Referring to FIG. 1, conventional pulse radio receiving apparatus 10 detects received signal 21 in ASK (Amplitude Shift Keying) detector 11. Next, amplifier 12 amplifies both the direct current component and the alternating current component of the signal, and A/D converter 13 converts the analogue signal to a digital signal and generates digital signal 22. DSP 14 finds the maximum values and minimum values of this digital signal 22 in a predetermined period and moving averages of these values, and tracks the synchronization timing as follows.
First, extreme value detection section 15 detects the minimum values and maximum values of inputted digital signal 22 in a plurality of predetermined periods, and outputs these values to moving average section 16. Then, moving average section 16 finds averages of a plurality of maximum values and averages of a plurality of minimum values in a plurality of predetermined periods and outputs these averages to average section 17. Further, average section 17 finds an average of the maximum values and an average of minimum values inputted from moving average section 16 and further finds an average of moving average values of these averages, and outputs this average to binarization operation section 18. Furthermore, binarization operation section 18 binarizes digital signal 22 inputted from A/D converter 13 using the value inputted from average section as the threshold. This binarized data is outputted to signal processing circuit 19 as NRZ (Non Return to Zero) data sequence 23.
Patent Document 1: Japanese Patent Application Laid-Open No. 2000-78211 (page 17 and FIG. 3)